TSMC
2330 · TWSE
Supply-chain layerCoWoS, SoIC and 3DFabric integration
TSMC integrates leading-edge logic with HBM through CoWoS and 3DFabric; its own annual report ties CoWoS growth directly to AI demand and larger package formats.
Supply-chain research brief
Map HBM, CoWoS-class packaging, substrates, bonding, inspection, test, and material constraints behind AI accelerators.
Market map
AI accelerator output is constrained by a coupled memory-and-packaging system. HBM stacks require advanced DRAM processes and through-silicon-via assembly; logic and memory then need high-density 2.5D or 3D integration, large substrates, fine-pitch bonding, thermal materials, inspection, and final test. A shortage or yield problem in one layer can strand capacity elsewhere.
The directory separates HBM manufacturers, foundry integration, OSAT capacity, assembly equipment, inspection and test, substrates and interposers, and materials. This avoids treating every semiconductor company as equivalent and makes visible diversified suppliers whose current theme revenue may be small but whose process position is difficult to replace.
Scores belong to the Advanced Packaging & HBM membership, not to a generic semiconductor identity. Revenue exposure is left undisclosed unless a company reports it; estimates must be explicitly labeled. The full directory records source maturity, thesis, invalidation risk, and the next evidence needed to distinguish durable scarcity from a cyclical capacity build.
Research universe
Public preview
Examples are selected by the current research-priority ordering. Scores, risks, evidence, and the complete supplier map remain in the full directory.
2330 · TWSE
Supply-chain layerCoWoS, SoIC and 3DFabric integration
TSMC integrates leading-edge logic with HBM through CoWoS and 3DFabric; its own annual report ties CoWoS growth directly to AI demand and larger package formats.
000660 · KRX
Supply-chain layerHBM memory
SK hynix is a direct HBM supplier and is co-developing HBM4 base-die and packaging technology with TSMC, placing it at the memory-to-package interface.
BESI · Euronext Amsterdam
Supply-chain layerDie attach and hybrid bonding equipment
Besi supplies die-attach and hybrid-bonding equipment positioned at the transition toward finer-pitch chiplet and 3D integration.
CAMT · NASDAQ
Supply-chain layerAdvanced packaging inspection and metrology
Camtek targets inspection and metrology for advanced packaging, where larger packages and finer interconnects increase defect-detection requirements.
6857 · TSE
Supply-chain layerMemory and system-level test
Advantest test systems are critical to screening high-value logic and HBM before and after integration, where known-good-die economics become more important.
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Questions
HBM bandwidth becomes useful only after memory stacks, logic dies, interposers, substrates, bonding, thermal control, and test are integrated at acceptable yield.
HBM supply, advanced foundry capacity, hybrid or thermo-compression bonding, large substrates, inspection, known-good-die testing, thermal materials, and qualified OSAT capacity can each constrain output.
Only disclosed segment or product data is treated as sourced exposure. Undisclosed theme percentages are omitted or explicitly marked as estimates.